HP VXI E1432A Manual de usuario Pagina 89
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In the example above, Mainframe A contains the Slot 0 Controller for a
multiple mainframe system. Mainframe A is connected to Mainframe B with
a VXI-MXI interface, HP E1482B. To successfully manage this multiple
mainframe environment, use the following guidelines.
q Locate modules with logical addresses less than 128 in Mainframe A.
q Locate modules with logical addresses greater than 127 in Mainframe B.
q Locate the highest-numbered channels in Mainframe A.
q Locate the last module in the module list specified in the call to
e1432_assign_channels() in Mainframe A.
q Locate the module that generates the group synchronization pulse in
Mainframe A.
q Locate the channels performing channel triggering in Mainframe A.
q Locate the module with the shared sample clock in Mainframe A.
q If you do not use a groupID with the call e1432_read_data(), empty the HP
E1432As’ FIFOs in Mainframe B before Mainframe A. In other words, do not
empty the FIFOs in Mainframe A unless you have emptied the FIFOs in
Mainframe B. For more information about groupID see “Grouping of
Channels/Modules.”
q If more than two mainframes are needed, daisy-chain them together. Treat each
mainframe after the first as a Mainframe B. See the example on the next page.
Phase Performance in Multiple Mainframe Measurements
Phase specifications are degraded by the delay that the inter-mainframe
interface gives the sample clock. This delay is insignificant for many
low-frequency applications because the phase error is proportional to
frequency. A system with two VXI-MXI modules and a 1 meter cable,
typically has a 76 nanosecond (ns) sample clock delay in Mainframe B.
This corresponds to an additional 0.007 degree phase error at 256 Hz and
an additional 0.55 degree phase error at 20 kHz.
A 4 meter cable adds approximately 18 ns of delay for a total of 94 ns
clock delay in Mainframe B. This corresponds to an additional 0.0087
degree phase error at 256 Hz and an additional 0.68 degree phase error at
20 kHz.
The cable adds approximately 6 ns per meter of cable.
Each daisy-chained mainframe adds another increment of delay, but only for
the additional cabling length.
HP E1432A User's Guide
The C-Language Host Interface Library
4-15
- HP E1432A 1
- User’s Guide 1
- In This Book 3
- TABLE OF CONTENTS 5
- 3 Using the HP E1432A 6
- 5 Module Description 7
- 7 The Tachometer 8
- 8 Break Out Boxes 8
- Installing the HP E1432A 11
- To inspect the HP E1432A 12
- To install the HP E1432A 13
- To store the module 16
- To transport the module 17
- Getting Started With the 19
- 1 Log in as root 24
- 3 Type swinstall 24
- HP VEE example programs 28
- Figure 2-4: HP VEE help text 30
- Visual Basic example programs 37
- Using the HP E1432A 39
- What is VXIplug&play? 41
- A set of source (.C) files 42
- Header and Library Files 44
- Channels and groups 45
- Do not source CLK10 52
- Baseband Measurement Spans 55
- Decimation Filter Diagram 55
- Measurement Process 58
- LHLHL HLH 59
- Arm Trigger MeasureIdle 60
- Level mode 64
- Bound mode 64
- Block Mode (HP E1431A) 65
- Continuous Mode 65
- Overlap Block Mode 65
- Limit on Queuing of Data 66
- Where to get more information 73
- The C-Language Host 75
- Interface Library 75
- Parameter Information 78
- Global Parameters 79
- Channel IDs 84
- Group IDs 85
- HP E1432A Interrupt Behavior 100
- HP E1432A Interrupt Handling 101
- Host Interrupt Setup 101
- Host Interrupt Handling 102
- Module Description 105
- Module Features 106
- HP E1432A User's Guide 107
- Block Diagram 107
- HP E1432A HP E1432A HP E1432A 109
- 16 CHANNEL 110
- 51.2 kSa/s 110
- Digitizer + DSP 110
- Status LEDs 111
- SMB Connectors 111
- Input Connectors (1, 2, or 4) 111
- VXI Backplane Connections 112
- Local Bus vs VME Transfers 113
- The HP E1432A VXI Device 114
- Sync/Trigger line 117
- Free-running clock line 117
- Calibration Description 119
- The Arbitrary Source 121
- Option (1D4) 121
- Arbitrary Source Description 122
- The Arbitrary Source Option 123
- The Tachometer 127
- Option (AYF) 127
- Tachometer Description 128
- Break Out Boxes 133
- Introduction 134
- 8 CH INPUT 135
- Break Out Box Cables 137
- Allowed Connections 138
- Dis-allowed Connections 140
- Troubleshooting the 141
- Diagnostics 142
- Replacing Assemblies 145
- Replaceable Parts 146
- Mfr No. Mfr Name Address 147
- Assemblies: with option AYF 150
- Assemblies: with option 1D4 152
- To remove the top cover 158
- To remove the front panel 159
- To remove the A1/A11 assembly 167
- Backdating 169
- Appendix A 171
- The HP E1432A VXI Registers 172
- are the values 177
- Reading 32-bit Registers 180
- Writing 32-bit Registers 181
- Controller Protocol Examples 183
- Write Command 183
- Read Response 183
- Wait for Done 184
- Complex Sequences 184
- Technical Specifications 187
- Specifications 188
- Option 1D4 Arbitrary Source 191
- Option AYF Tachometer Input 194
- 10 of 12 196
- 11 of 12 197
- Glossary 199
- VXIplug&play 205
- HP 1432A User's Guide 208
- Need Assistance? 215
- Declaration of Conformity 217
- About this edition 219
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